1. Field of the Invention
The present invention relates to a technology for supporting design of a drawing for implementing an IC based on logical drawings.
2. Description of the Related Art
An integrated circuit (IC) design support program has conventionally been used to support design for large scale and complicated ICs such as Large Scale Integration (LSI). The IC design support program allows efficient IC design by automated design in such a manner that cells being logic gates forming the IC are arranged to be automatically interconnected to each other.
Recently, higher-speed performance of more complicated processes has been demanded of the IC such as LSI, but the IC automatically designed by the IC design support program cannot exhibit the demanded performance. To meet the demand, for example, Japanese Patent Application Laid-Open No. H3-88073 discloses a layout editor to support the IC design capable of manually correcting a pattern of the automatically designed IC.
As explained above, manually operated design is still important for the design of the IC. To support the manually operated design, for example, Japanese Patent Application Laid-Open No. 2004-30308 discloses a method of creating a layout for IC design. The method is such that a circuit pattern, which is generally hierarchized with several layers, is two-dimensionally displayed on one plane to achieve improved visibility, and that a cell pattern is copied to obtain one with the same structure, to enable elimination of work redundancy.
Japanese Patent Application Laid-Open No. H5-165908 discloses a drawing editor that creates a macro of part of a manually created circuit drawing, uses a macro symbol as the created macro to enable creation of a higher hierarchical drawing, and that reduces human error such that part of the manually created circuit drawing does not match a higher hierarchical drawing created using the manually created circuit drawing. Furthermore, Japanese Patent Application Laid-Open No. 2001-256264 discloses a board-design support device capable of checking a difference between a board specification such as wiring information for a registered block which is previously registered and a board specification of a circuit block which is an object to be designed, converting the board specification of the registered block so as to match the board specification required for the circuit block, and using the converted board specification for setting of the board specification such as wiring information for the circuit block to be designed.
In the conventional technologies, however, when cells are manually arranged and adjusted during designing of the IC, a cell to be arranged is selected from a list. Therefore, checking logical connections of enormous amounts of cells still causes a large number of processes to be produced. When design work in particular requires many processes and if correction of the work occurs in an upstream process thereof when the work has proceeded up to a downstream process thereof, the work needs to go back all the way to the upstream process where the correction occurs.
More specifically, in the conventional technologies, a copy or a macro of a cell pattern having the same structure is created, and by using the copy or the macro, work redundancy can be eliminated. However, when cells are to be manually arranged or adjusted, the cells are selected from a list, and this may cause error in selection, which leads to reduction in work efficiency.
In the conventional technology represented by Japanese Patent Application Laid-Open No. H3-88073, the logical drawing is displayed when cells are manually arranged or adjusted, and this allows selection of an object to be implemented while checking the logical connection, but the displayed logical drawing is only one.